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1993-01-31
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Logisym Copyright 1992 Andrew J. Dobson All rights Reserved
( loj'i - sim )
1. What is logisym ? Overview, and specifications.
2. Demonstrations A look at the circuit files in
PACKING.LST
3. Registering Logisym What your money buys, now and in the
future.
4. Disclaimer
5. Acknowledgements
1. What is LOGISYM:
Logisym is a digital logic simulator, intended to assist you
in understanding, debugging, and verifying, the operations of
combinational and sequential digital logic circuits.
The simulator utilizes a 'unit delay' model, and very
accurately represents the operations of circuits built from the
basic logic functions, providing a timing diagram of the trace
output, much like a 16 trace ocilloscope.
The device library internal to logisym includes the following
functions: AND, OR, NAND, NOR, (up to 8 input); XOR, NOT, BUFFER,
an RS flipflop (cross coupled NAND), a positive edge triggered D
type flipflop, and a positive edge triggered JK flipflop.
Up to 650 logic devices may be defined, and 16 points may be
observed during a simulation.
Logisym provides 26 different signals or 'clocks' to be used as
inputs to the circuit(s) being simulated. These are: A variable
frequency eight bit up/down counter, a variable frequency four bit
ring counter, a variable rate random data generator, and eight bits
of data controlled by way of the function keys on the keyboard. Fixed
high and low logic levels are also available as tiepoints for unused
inputs.
Logisym will run on any IBM compatible computer with at least
512K RAM and a VGA monitor and card. A mouse is preferred but not
required. Logisym version 3.1 provides a printout of the trace screen
to either a 9 pin Epson type dot matrix printer or a HP compatible
laser printer.
2. Demonstrations:
Included with the simulator are 12 circuit files, they have the
extension .CKT. See the file PACKING.LST for more information regarding
each circuit file. Tutorials on using Logisym are found in DEMOS.TXT.
Print DEMOS.TXT and have it with you when you run LOGISYM for the first
few times, until you fully understand the features and operations of
Logisym. These tutorials demonstrate Logisyms features, aspects on the
operation of the simulator and a brief discussion about the circuits
being simulated.
3. Registering LOGISYM:
Logisym version 3.0 is a SHAREWARE package designed to promote
the full version: LOGISYM 3.1. Version 3.0 is identical to 3.1 with
a few features disabled, the addition of the shareware notice, and
absence of documentation concerning the subject of creating circuit
files used by the simulator. Disabled features of version 3.0 are:
hardcopy of the trace screen, pop-up help, the ability to save and
restore the button/knob settings, and detailed error messages that
may be generated while loading and parsing the circuit files.
As of this release, version 3.1 is complete, and work on
finishing the documentation is underway.
Registered users receive version 3.1 on diskette, a printed copy
of the documentation, and minor upgrades as they occur. Educational
institutions also receive rights to copy the software and documentation
for distribution to students for use in related course work. An
institutional license holder may not however SELL logisym.
The registration fees are as follows:
Individual license $ 25.00
US funds
Educational Site license $ 250.00
All registered users are invited to provide input and direction
for version 4.0. Those who provide the most innovative ideas will
receive, at no cost, a complete registered version of LOGISYM 4.0,
when released. Minor version upgrades will be released to all version
3.1 owners at no charge.
To register LOGISYM and recieve version 3.1 with complete
documentation, and 3.x upgrades: print the file LOGISYM.REG, answer
the questions, enclose a check or money order payable to:
Andrew J. Dobson
mail to:
Andrew J. Dobson
106 W, Mowry St.
Chester Pa 19013
U.S.A.
4. Disclaimers:
Logisym uses a 'unit delay' model of basic logic functions.
The Author makes no guarantees as to the results of any simulation,
or the results of a comparison of any simulation to an actual
prototype circuit of the same design.
5. Acknowledgements:
I wish to thank:
Dr. Joseph D. Bissell
Dr. John D'Alessandro
Dr. John A. Okolowski
E. Martin Powell
William Swezey
for their input and support...
... and to my Daughter, Lauren.